Asic Jobs
Browse 42 exciting jobs hiring in Asic now. Check out companies hiring such as HRL Laboratories, NVIDIA, Jobgether in Albuquerque, Mobile, Phoenix.
Technical leader needed to manage and grow a multidisciplinary mixed-signal ASIC design team delivering EO/IR sensor chips and camera integration for demanding aerospace applications.
Lead the development of machine-learning based power and energy models to influence architectural and design decisions that improve GPU and SoC energy efficiency at NVIDIA.
Lead emulation strategy and infrastructure at Alphawave IP as a Staff Emulation Engineer, driving methodology, automation, and cross-functional support for complex SoC/ASIC projects.
NVIDIA is hiring a Senior Circuit Design Engineer to lead transistor-level and custom digital IP design for cutting-edge GPU and AI products.
Lead emulation strategy and hands-on infrastructure development for large-scale SoC/ASIC projects at Alphawave IP, optimizing platforms, automation, and cross-functional bring-up workflows.
SpaceX is hiring software engineering interns for Summer 2026 to work onsite across multiple sites on mission-critical software and infrastructure spanning Starship, Falcon, Dragon, Starlink, and related programs.
Lead and grow Eliyan’s physical design organization to deliver advanced-node ASIC tapeouts that meet stringent power, performance, and area targets for next-generation AI and data center solutions.
Contribute to NVIDIA’s hardware ASIC teams on a 12-week, full-time internship building and verifying RTL and physical-design solutions for next-generation accelerated computing products.
NVIDIA seeks PhD candidates for 2026 hardware research internships to advance cutting-edge VLSI, ASIC, and EDA technologies used in AI and accelerated computing.
Lead a hands-on team delivering high-speed mixed-signal digital subsystems for Flux Computing's next-generation optical AI processors, driving first-time-right delivery and cross-functional execution.
SpaceX’s Starlink engineering team is hiring a Sr. ASIC/SoC Verification Engineer to lead digital verification efforts for advanced space- and ground-deployed ASICs.
Work with Micron’s Product Architecture team to analyze and prototype DRAM and system architectures that improve performance and efficiency for AI workloads.
Lead validation architecture for next-generation NVLink interconnects, building models and driving test and integration efforts across pre- and post-silicon environments.
Bosch is hiring a Technical Sales Account Manager in Sunnyvale to drive MEMS sensor design wins and manage Tier‑1 OEM relationships across product lifecycle stages.
Lead test automation and factory testing for a fast-growing AI-ASIC startup in San Jose to ensure production devices meet stringent performance, reliability, and compliance standards.
NVIDIA seeks a Senior Silicon Product Development Engineer to lead ATE test content and yield optimization efforts for next-generation Data Center GPUs.
NVIDIA seeks a Product Development Engineer to lead GPU characterization, test process development and yield improvement efforts for cutting-edge ASICs.
Experienced Technical Program Manager Leader needed to lead silicon bring-up, wafer forecasting, and cross-functional allocation efforts at NVIDIA's Santa Clara engineering operations.
Senior ASIC Design Engineer role at NVIDIA focusing on mixed-signal and digital IP design to improve power and performance for next-generation GPUs.
Lead and scale Etched’s end-to-end supply chain from component sourcing and NPI to high-volume server and rack integration, building processes and supplier relationships to enable timely, cost-effective delivery.
Bitmain seeks an experienced ASIC Repair Engineer to diagnose, repair, and bring up S19 XP, S21, and T21 miners while maintaining high-quality repair records and uptime.
SpaceX is hiring a Sr. Signal and Power Integrity Engineer to lead SI/PI design, simulation, verification, and troubleshooting for Starlink satellite payload hardware across concept to production.
SpaceX is hiring a Senior ASIC Design Engineer to implement and verify RTL for next-generation ASICs/FPGAs that will expand Starlink's global connectivity capabilities.
Work with Intel's Silicon Hardware Engineering teams as an intern contributing to design, verification, validation and performance optimization of next-generation processors and platforms.
Draper is hiring a Hardware IC Engineer I in Cambridge to design, simulate, verify, and help implement ASICs for mission-critical R&D systems.
Senior systems engineer to lead technical integration and systems lifecycle activities for advanced microelectronics programs at Northrop Grumman's Linthicum/Annapolis Junction site.
Northrop Grumman is hiring a Staff SEIT Lead Systems Engineer to drive systems integration and technical leadership for cutting-edge microelectronics programs at Annapolis Junction/Linthicum, MD.
Etched is hiring an Electrical Engineer to lead schematic/PCB design and system bring-up for UBB/VBB carrier platforms driving next-generation AI accelerator deployments in San Jose.
Solidigm is hiring a 3D NAND IP Logic Design Engineer to design and verify SystemVerilog RTL, develop microcode-based NAND algorithms, and lead pre/post-silicon validation for next-gen memory products.
Lead the design and delivery of scalable laser modules for silicon photonics at Lightmatter, helping enable next‑generation AI data center infrastructure.
Experienced Electrical Engineer needed to design test interfaces, PCBs, and automated test programs for radiation-hardened microelectronic components at NSWC Crane supporting DoD systems.
Drive physical design and static timing analysis to achieve timing closure on high-performance ASICs (GPUs/CPUs/SoCs) at NVIDIA's Santa Clara engineering team.
Work on Etched's SoC power flows to generate accurate power profiles, build automation for RTL/gate-level estimation, and support IR/thermal sign-off for high-performance AI ASICs.
Innovate next-generation NVLink system software as a Senior Engineer at NVIDIA, a leader in AI and HPC technologies.
Lead Riverlane’s US qLDPC research efforts—driving code and decoder innovation, mentoring a growing team, and translating research into impactful QEC solutions.
Renesas is hiring a Principal DSP/Control Engineer to architect and implement digital control loop subsystems for cutting-edge semiconductor products in Austin, TX.
Senior Digital Design Engineer role at Riverlane to develop advanced quantum error correction hardware IPs within a collaborative hybrid work environment.
Experienced digital design engineer needed at Renesas to develop and architect RTL solutions within a dynamic semiconductor company.
Lattice is seeking an experienced Field Applications Engineer to provide technical leadership and customer support for their programmable logic products in San Jose, CA.
Advanced semiconductor firm seeks Senior Engineer to lead GPU micro-architecture and RTL design efforts with a hybrid work model based in Austin, TX.
Experienced Electrical Engineer needed at Northrop Grumman to lead innovative military electronics design and development projects.
Electrical Engineer Intern at Sensata Technologies contributing to aerospace electronics projects through prototype development, design, and testing during Summer 2026.
