Sr. SerDes Characterization and Validation Engineer (Silicon Engineering) - job 1 of 2
Skills
- 5+ years characterizing and/or validating SerDes IP
- Experience with SerDes architectures (NRZ, PAM4) and components (CTLE, DFE, FFE, CDR, PLL)
- Proficiency with high-speed test equipment (BERTs, high-speed oscilloscopes)
- Experience with SerDes signal integrity analysis (eye diagrams, bathtub curves)
- Software skills for bring-up (Python, C/C++)
- Familiarity with high-speed protocols (Ethernet, PCIe) is a plus
Responsibilities
- Bring-up, validate, and characterize high-speed SerDes blocks in new and existing silicon
- Develop test methods to evaluate SerDes performance and calculate operating margins across PVT and space-specific environments
- Define loopback and test infrastructure logic with ASIC design team to ensure adequate silicon test coverage
- Collaborate with electrical design team on signal integrity, power integrity, and EMC concerns and propose mitigations
- Evaluate SerDes IP from internal and external providers for logical and electrical compatibility
- Write software routines (Python, C/C++) to bring up and validate SerDes and collaborate on driver integration
- Author comprehensive test reports documenting boundary conditions and results
Education
- Bachelor's degree in an engineering discipline (required)
- MS or PhD in electrical engineering, computer engineering, or computer science (preferred)
Benefits
- Comprehensive medical, vision, and dental coverage
- 401(k) retirement plan
- Short- and long-term disability insurance and life insurance
- Eligibility for long-term incentives (stock, options, or cash awards) and ESPP
- Paid parental leave
- Approximately 3 weeks paid vacation and 10+ paid holidays per year
- Exempt employees eligible for 5 days sick leave per year
- Various employee discounts and perks
Average salary estimate
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