Pcie Jobs
Browse 34 exciting jobs hiring in Pcie now. Check out companies hiring such as Rivos, Marvell, NVIDIA in Rochester, Yonkers, Port St. Lucie.
Embedded software engineer needed to develop Linux kernel drivers, optimize real-time firmware, and collaborate with silicon teams to bring new chips and boards to production.
Lead end-to-end board hardware architecture and validation for high-speed semiconductor platforms at Marvell’s Multimarket Business Group in Santa Clara.
NVIDIA is hiring a System Design Engineer to lead power solution design, validation, and debugging across multiple product families, delivering high-quality, timely solutions.
KIOXIA America is hiring a Staff Customer Qualification Engineer to lead qualification testing, failure analysis, and issue resolution for datacenter SSDs.
Lead component selection, qualification, and failure analysis for a global networking/compute leader's next-generation platforms as a hands-on Component Engineer Technical Lead based in San Jose.
Senior HSIO Architect role focused on system-level high-speed I/O architecture, post-silicon validation, and cross-functional optimization for NVIDIA's GPU-accelerated platforms.
Teledyne Technologies is hiring a seasoned hardware engineer contractor in Milpitas to drive board design, high-speed hardware validation, and manufacturing release for advanced sensing products.
Lead system-level HDL and FPGA architecture for advanced RF and antenna products at a fast-growing private engineering company.
CesiumAstro is hiring an FPGA Engineering Manager to lead geographically distributed FPGA teams, standardize design methodology, and deliver complex FPGA solutions for aerospace and communications products.
Lead FPGA architecture, RTL development, and hardware bring-up to implement real-time DSP and control systems for a next-generation FMCW LiDAR product at a fast-moving silicon photonics startup.
Experienced hardware engineer needed to investigate and resolve complex production issues on high-speed networking systems, collaborating across design, firmware, and field teams at Arista Networks.
Work on low-level network systems software at Arista Networks to design and implement hardware control, bring up new platforms, and deliver production-quality features in C/C++ and Python.
NVIDIA is hiring a Senior Digital Design Verification Engineer to develop and execute verification infrastructure and test plans for high-speed SerDes IPs used across AI and autonomous platforms.
Lead development of OpenAI's Linux kernel stack and low-level system software to enable high-performance, scale-out AI infrastructure.
NVIDIA is hiring a Senior Solutions Architect (Networking) to lead technical pre-sales and integrate compute and networking solutions for AI and data center customers.
Lead partner strategy and ecosystem development to expand NVLink Fusion adoption with hyperscalers, OEMs, silicon partners and cloud providers.
Lead development of low-level network systems software at Arista's Austin engineering team, working on device drivers, hardware control, and performance optimization for high-scale networking products.
Lead end-to-end hardware circuit pack design and validation at Ciena, delivering high-speed, production-ready PCB solutions in collaboration with multidisciplinary teams.
SpaceX Starshield is hiring an FPGA Engineer to build and validate flight-ready FPGA designs for secure, high-throughput satellite systems.
Lead hardware integration and NPI for rack-scale HPC systems at Lambda, turning platform blueprints into production-ready compute, storage, and network solutions.
Lead technical design and performance optimization of hyperscale AI/ML and HPC systems for NVIDIA’s largest customers, serving as a trusted, customer-facing solutions architect.
Work on multi-FPGA, low-latency hardware systems at Riverlane to implement QEC decoders, high-throughput data movement and low-latency interfaces as a Digital Design Engineer.
Work on cutting-edge SSD firmware at Solidigm, developing embedded C/C++ solutions and collaborating with hardware and cross-functional teams to deliver high-quality storage products.
Anduril is hiring a Test Automation Engineer to design and implement automated functional testers and lead end-of-line test strategies for PCBA and system-level validation.
Etched is hiring an Electrical Engineer to lead schematic/PCB design and system bring-up for UBB/VBB carrier platforms driving next-generation AI accelerator deployments in San Jose.
SanDisk is hiring a Senior Firmware Verification Engineer to develop and validate security and protocol tests for SSD firmware and drive product quality across complex storage interfaces.
Lead the design and delivery of transactor and BFM solutions for Intel’s Server SoC emulation environment while mentoring a team of engineers.
Lead FPGA design and verification efforts for Red 6's ATARS product, applying deep FPGA expertise to high-speed interfaces, timing closure, and system integration in a fast-paced aerospace environment.
Lead FPGA Engineer to architect and deliver high-performance multi-FPGA designs and lead the FPGA engineering team for Red 6's AR-based training systems.
Lead Electrical Engineer needed to design and deliver rugged, high-speed avionics electronics for Red 6's augmented-reality training systems.
Lead development and customer-driven engineering of AI server and rack-scale solutions to drive product excellence and market adoption at d-Matrix.
Lead engineering and customer-facing efforts to design, validate, and optimize AI server and rack-scale solutions that power next-generation datacenter inference workloads.
Senior Digital Design Engineer role at Riverlane to develop advanced quantum error correction hardware IPs within a collaborative hybrid work environment.
Lead the architecture and design of advanced high-performance SoCs at Intel’s CTO AI Group, driving innovation in AI silicon solutions.
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