Marvell is hiring a Staff Package Development Engineer to drive signal and power integrity, modeling, and qualification for advanced high-speed IC packages supporting 448 Gb/s and higher.
Marvell is hiring a DSP Architecture System Modeling Engineer to design and implement C/C++ DSP system models and perform silicon-correlated analysis for high-speed SerDes up to 448G.
Lead micro-architecture and RTL development for high-performance, timing-critical DSP and connectivity designs at a global semiconductor company.
Lead customer-facing integration, validation, and debugging of Marvell's coherent DSP platforms for high-speed optical systems from our Santa Clara lab.
Lead Marvell's foundry technology organization to drive NPI, yield enhancement, reliability and high-volume production ramp for cutting-edge SoC products.
Lead NPI and product engineering for advanced optical transceivers and light engines at Marvell, owning yield, manufacturability, characterization, and production readiness.
