DFT Verification Engineer
Skills
- 2+ years of advanced design verification experience, including UVM
- Strong Python scripting skills for test automation and tooling
- Familiarity with DFT concepts and willingness to grow in DFT
- Experience with SystemVerilog and DV languages
- Ability to debug across digital, analog, and photonic domains
- Experience collaborating with cross‑functional engineering teams
Responsibilities
- Define and enhance DV‑DFT methodologies for integrated digital/analog/photonic devices
- Create and execute test plans to ensure high‑quality tapeouts that meet functional and performance goals
- Collaborate with architects, DV engineers, designers, and test engineers to define validation flows
- Develop reusable, scalable testbench components, checkers, and DV architecture
- Create and validate functional test vectors for High Volume Manufacturing (HVM)
- Support DFT flow development, ATPG, validation, and silicon debug
- Improve and document DFT implementation methodology and flows
Education
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field (required)
- Master’s or higher in EE/CE or related fields (preferred)
Benefits
- Comprehensive health care (medical, dental & vision)
- Retirement savings matching program
- Life insurance (basic, voluntary & AD&D)
- Generous paid time off, sick leave & public holidays
- Paid family leave
- Short‑term & long‑term disability
- Training & development programs
- Commuter benefits
- Flexible hybrid workplace model
- Equity grants for full‑time employees
Average salary estimate
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