Browse 13 exciting jobs hiring in Dft now. Check out companies hiring such as WHOOP, Pure Storage, Intel in Richmond, Fayetteville, Ontario.
Lead development of low-power embedded hardware for WHOOP's wearable devices, ensuring high reliability, manufacturability, and world-class performance.
Pure Storage is hiring a Product Engineer, NPI in Santa Clara to lead DFM/DFT, BOM management, prototyping and manufacturability for next-generation high-density flash storage systems.
Intel seeks an entry-level SoC Design Engineer to perform RTL-to-GDS physical implementation, timing/power signoff, and design optimization for data-center SoC products.
Experienced RF-focused sustaining engineer needed to support production, troubleshoot RF/microwave hardware, and drive continuous improvement at a fast-moving aerospace company.
Broadcom is seeking an experienced Staff DFT Engineer to lead DFT architecture, ATPG flows and post-silicon validation for ASIC products in San Jose.
Intel's Silicon Engineering Group seeks a Physical Design Engineer to drive RTL-to-GDS implementation, timing/power closure, and verification for high-performance CPU cores.
Lead the design and deployment of advanced electrical test systems for V-BAT at Shield AI, combining power electronics, RF, PCB design, and automation to ensure mission-ready UAV hardware.
Senior-level test engineering role at Analog Devices focused on developing high-performance ATE solutions, test hardware, and test programs for mixed-signal converters across product development and production.
NVIDIA seeks a Senior Test Methodology Engineer to define and implement ATE test solutions and automation for next-generation GPUs and AI server platforms.
Work remotely on industry-leading SoCs implementing and optimizing DFT solutions (SCAN, MBIST, BSCAN) from RTL through manufacturing to improve test coverage and reduce test cost.
Drive RTL-to-GDS physical implementation and signoff for custom Xeon-based SoCs in Intel's Data Center Group, focusing on timing closure, power optimization, and manufacturability.
NVIDIA seeks a CPU Design Methodology Engineer in Hillsboro, OR to lead SOC design automation, RTL integration, and front-end quality processes for advanced CPU projects.
Experienced electrical engineer needed to lead PCB design, prototyping, and validation efforts for advanced PNT/defense systems at TAG in Ashburn, VA.
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