Systemverilog Jobs
Browse 31 exciting jobs hiring in Systemverilog now. Check out companies hiring such as Jobgether, Rivos, Penske Truck Leasing in Lexington-Fayette, Worcester, San Diego.
Lead emulation strategy and infrastructure at Alphawave IP as a Staff Emulation Engineer, driving methodology, automation, and cross-functional support for complex SoC/ASIC projects.
Rivos seeks a Silicon Power Engineer to lead power modeling, analysis, and optimization across CPU/SoC blocks, partnering closely with architecture and design teams to drive PPA improvements.
Lead emulation strategy and hands-on infrastructure development for large-scale SoC/ASIC projects at Alphawave IP, optimizing platforms, automation, and cross-functional bring-up workflows.
SpaceX is hiring software engineering interns for Summer 2026 to work onsite across multiple sites on mission-critical software and infrastructure spanning Starship, Falcon, Dragon, Starlink, and related programs.
Shape and lead the ML architecture at a seed-stage startup building agent-driven tooling to transform semiconductor design and deploy production-grade systems from day one.
Lead end-to-end FPGA RTL architecture and flight-ready firmware development for E-Space's LEO satellite avionics from our Saratoga office.
Contribute to NVIDIA’s hardware ASIC teams on a 12-week, full-time internship building and verifying RTL and physical-design solutions for next-generation accelerated computing products.
A paid, full-time 12-week hardware verification internship at NVIDIA in Santa Clara for students pursuing degrees in electrical or computer engineering to work on real verification and validation projects.
NVIDIA seeks ambitious Bachelor's, Master's, and PhD students for 12-week Mixed Signal and Digital Circuit Design internships to contribute to impactful hardware projects using modern EDA tools and lab test equipment.
NVIDIA is hiring Computer Architecture interns for paid, hands-on 12-week projects focused on GPU/CPU architecture, VLSI, parallel programming, and high-performance computing.
NVIDIA seeks PhD candidates for 2026 hardware research internships to advance cutting-edge VLSI, ASIC, and EDA technologies used in AI and accelerated computing.
Paid 12-week hardware engineering internships at NVIDIA offering hands-on projects in system validation, hardware design, mechanical engineering, or silicon solutions for students pursuing EE/CE or related degrees.
Lead a hands-on team delivering high-speed mixed-signal digital subsystems for Flux Computing's next-generation optical AI processors, driving first-time-right delivery and cross-functional execution.
CesiumAstro is hiring an FPGA Engineering Manager to lead geographically distributed FPGA teams, standardize design methodology, and deliver complex FPGA solutions for aerospace and communications products.
SpaceX’s Starlink engineering team is hiring a Sr. ASIC/SoC Verification Engineer to lead digital verification efforts for advanced space- and ground-deployed ASICs.
NVIDIA is hiring a Senior Digital Design Verification Engineer to develop and execute verification infrastructure and test plans for high-speed SerDes IPs used across AI and autonomous platforms.
Senior ASIC Design Engineer role at NVIDIA focusing on mixed-signal and digital IP design to improve power and performance for next-generation GPUs.
SpaceX Starshield is hiring an FPGA Engineer to build and validate flight-ready FPGA designs for secure, high-throughput satellite systems.
Lead microarchitecture and RTL development for power management and debug features at Rivos, working across SoC teams to deliver high-performance, power-efficient RISC-V server solutions.
Northwood Space is hiring an FPGA Engineer to develop robust FPGA networking and DSP subsystems for its antenna communication products at the Torrance office.
Lead cross-functional teams to deliver and commercialize Tenstorrent's RISC-V IP, ensuring smooth customer adoption and world-class technical delivery.
Work on RTL and micro-architecture for AI/ML and data-analytics accelerators, using SystemVerilog, architecture insight, and synthesis/physical-design awareness to deliver high-performance, low-power designs.
SpaceX is hiring a Senior ASIC Design Engineer to implement and verify RTL for next-generation ASICs/FPGAs that will expand Starlink's global connectivity capabilities.
Lead and own verification strategy and implementation for cutting-edge DDR5/DDR6 memory data buffer chips at Renesas, driving quality, performance, and team mentorship.
Solidigm is hiring a 3D NAND IP Logic Design Engineer to design and verify SystemVerilog RTL, develop microcode-based NAND algorithms, and lead pre/post-silicon validation for next-gen memory products.
Lead the design and delivery of transactor and BFM solutions for Intel’s Server SoC emulation environment while mentoring a team of engineers.
Lightmatter is hiring a DFT Verification Engineer to develop DV‑DFT methodologies and validate integrated photonics SoCs in a hybrid Boston role.
Lead FPGA design and verification efforts for Red 6's ATARS product, applying deep FPGA expertise to high-speed interfaces, timing closure, and system integration in a fast-paced aerospace environment.
Lead FPGA Engineer to architect and deliver high-performance multi-FPGA designs and lead the FPGA engineering team for Red 6's AR-based training systems.
Experienced digital design engineer needed at Renesas to develop and architect RTL solutions within a dynamic semiconductor company.
Advanced semiconductor firm seeks Senior Engineer to lead GPU micro-architecture and RTL design efforts with a hybrid work model based in Austin, TX.
How much do systemverilog jobs pay?
Below 50k*
0
|
50k-100k*
7
|
Over 100k*
25
|
Top companies hiring for systemverilog jobs
Best cities to find systemverilog jobs
- Austin 2
- Duluth 2
- Santa Clara 1
