Member of Technical Staff (#93071)
Responsible for performing the microarchitecture and logic design verification of Rivos central
processing unit (CPU). Study the CPU architecture specifications and performance features
specifications, write, and execute test plans, build test benches, and verification infrastructures
for performance features. Manage testbenches and work with micro architect engineers to verify
the design, fix bugs, as well as work with the post-silicon verification engineers to verify silicon
bugs. Execute test plans for features specified in architecture and performance specifications to
build and enhance the verification infrastructures for a focused design area. Discuss design plans
using RTL design language such as Verilog, logic assertion, and verification flow. Design
control systems using programming languages such as System Verilog, C++, and Python. Work
closely with micro architects, logic designers and peer verification engineers to design
pragmatic design verification infrastructure code space that will be an effective verification plan
for complex designs. Test products for functionality and contribute to the overall quality of the
CPU’s functional and performance features focusing on targeted functionality and performance
specification.
- Master’s or foreign equivalent in Computer Engineering, Electrical Engineering, Electronic
- 6 months of experience in job offered or related occupation.
- 1. Computer Organization and Design.
- 2. Computer System Engineering.
- 3. Digital Systems Laboratory.
- 4. Manycore Parallel Algorithms.
- 5. Communication Networks.
- 6. Distributed Systems.
Worksite: 6433 Champion Grandview Way, Building 2, Suite 150, Austin, Texas 78750
Applicant Instructions: Email resume to: [email protected]. Include job code 93071 in reply. EOE.
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