Rise Jobs & Careers icon Rtl Jobs

Browse 16 exciting jobs hiring in Rtl now. Check out companies hiring such as Palo Alto Networks, Intel, NVIDIA in Amarillo, Austin, San Diego.

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Lead ASIC design verification efforts at Palo Alto Networks, architecting and executing coverage-driven verification across simulation, emulation, formal, and silicon validation to deliver secure, high-performance ASICs to production.

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Intel Hybrid US, California, Santa Clara
Posted 3 days ago
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Onsite Gym
Family Coverage (Insurance)
Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Resources
Life insurance
Disability Insurance
Health Savings Account (HSA)
Flexible Spending Account (FSA)
Learning & Development
Paid Time-Off
401K Matching
Maternity Leave
Paternity Leave

Intel seeks an entry-level SoC Design Engineer to perform RTL-to-GDS physical implementation, timing/power signoff, and design optimization for data-center SoC products.

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NVIDIA Hybrid US, CA, Santa Clara
Posted 7 days ago
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Growth & Learning
Transparent & Candid
Medical Insurance
Paid Time-Off
Maternity Leave
Mental Health Resources
Equity
Child Care stipend
Paternity Leave
WFH Reimbursements
Flex-Friendly
Dental Insurance
Vision Insurance
Life insurance
Health Savings Account (HSA)
Flexible Spending Account (FSA)
401K Matching
Military leave

NVIDIA is hiring a Senior GPU Power Architect to lead power modeling and hardware feature design that improves GPU efficiency for graphics and deep learning workloads.

Experienced Technical Program Manager needed to drive Design IP projects and customer engagements from conception through delivery at a leading EDA company.

Posted 12 days ago

Lead development of functional and cycle-accurate performance models and simulation tooling to steer architecture, software, and optical design decisions for a fast-growing AI systems company.

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SpaceX’s Starlink engineering team is hiring an FPGA/ASIC Engineer to develop and validate next-generation SoCs and FPGA designs for space and ground deployments using SystemVerilog/Verilog/VHDL.

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Posted 15 days ago
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Customer-Centric
Snacks
Onsite Gym
Family Coverage (Insurance)
Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Resources
Life insurance
Disability Insurance
Health Savings Account (HSA)
Flexible Spending Account (FSA)
Learning & Development
Paid Time-Off
401K Matching
Maternity Leave
Paternity Leave

Intel's Silicon Engineering Group seeks a Physical Design Engineer to drive RTL-to-GDS implementation, timing/power closure, and verification for high-performance CPU cores.

Logos Space Hybrid Mountain View or San Diego
Posted 15 days ago

Lead the architecture, design and delivery of FPGA-hosted DSP and transceiver IP for Logos Space's LEO satellite payloads and terminals, from concept to production.

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Inclusive & Diverse
Rise from Within
Mission Driven
Diversity of Opinions
Work/Life Harmony
Growth & Learning
Transparent & Candid
Customer-Centric
Snacks
Onsite Gym
Family Coverage (Insurance)
Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Resources
Life insurance
Disability Insurance
Health Savings Account (HSA)
Flexible Spending Account (FSA)
Learning & Development
Paid Time-Off
401K Matching
Maternity Leave
Paternity Leave

Lead RTL development and SoC-level IP integration as a Principal Engineer in Intel's Client Engineering Group, shaping architecture, verification, and delivery across CPU/GPU/NOC and advanced compute projects.

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Posted 20 days ago
Inclusive & Diverse
Rise from Within
Mission Driven
Diversity of Opinions
Work/Life Harmony
Growth & Learning
Transparent & Candid
Customer-Centric
Snacks
Onsite Gym
Family Coverage (Insurance)
Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Resources
Life insurance
Disability Insurance
Health Savings Account (HSA)
Flexible Spending Account (FSA)
Learning & Development
Paid Time-Off
401K Matching
Maternity Leave
Paternity Leave

Work remotely on industry-leading SoCs implementing and optimizing DFT solutions (SCAN, MBIST, BSCAN) from RTL through manufacturing to improve test coverage and reduce test cost.

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Intel Hybrid US, Texas, Austin
Posted 21 days ago
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Mission Driven
Diversity of Opinions
Work/Life Harmony
Growth & Learning
Transparent & Candid
Customer-Centric
Snacks
Onsite Gym
Family Coverage (Insurance)
Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Resources
Life insurance
Disability Insurance
Health Savings Account (HSA)
Flexible Spending Account (FSA)
Learning & Development
Paid Time-Off
401K Matching
Maternity Leave
Paternity Leave

Drive RTL-to-GDS physical implementation and signoff for custom Xeon-based SoCs in Intel's Data Center Group, focusing on timing closure, power optimization, and manufacturability.

Efficient Computer Hybrid San Jose, CA OR Pittsburgh, PA OR Remote
Posted 21 days ago

Lead RTL feature development and verification for a breakthrough, ultra-low-power general-purpose processor at a fast-growing hardware startup.

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Customer-Centric
Mission Driven
Inclusive & Diverse
Rise from Within
Diversity of Opinions
Work/Life Harmony
Growth & Learning
Transparent & Candid
Medical Insurance
Paid Time-Off
Maternity Leave
Mental Health Resources
Equity
Child Care stipend
Paternity Leave
WFH Reimbursements
Flex-Friendly
Dental Insurance
Vision Insurance
Life insurance
Health Savings Account (HSA)
Flexible Spending Account (FSA)
401K Matching
Military leave

NVIDIA is hiring an ASIC Design Engineer to build and maintain hardware design tools, automated RTL generation workflows, and verification methodologies that scale across product teams.

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Posted 23 days ago
Customer-Centric
Mission Driven
Inclusive & Diverse
Rise from Within
Diversity of Opinions
Work/Life Harmony
Growth & Learning
Transparent & Candid
Medical Insurance
Paid Time-Off
Maternity Leave
Mental Health Resources
Equity
Child Care stipend
Paternity Leave
WFH Reimbursements
Flex-Friendly
Dental Insurance
Vision Insurance
Life insurance
Health Savings Account (HSA)
Flexible Spending Account (FSA)
401K Matching
Military leave

NVIDIA seeks a CPU Design Methodology Engineer in Hillsboro, OR to lead SOC design automation, RTL integration, and front-end quality processes for advanced CPU projects.

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NVIDIA Hybrid US, CA, Santa Clara
Posted 23 days ago
Customer-Centric
Mission Driven
Inclusive & Diverse
Rise from Within
Diversity of Opinions
Work/Life Harmony
Growth & Learning
Transparent & Candid
Medical Insurance
Paid Time-Off
Maternity Leave
Mental Health Resources
Equity
Child Care stipend
Paternity Leave
WFH Reimbursements
Flex-Friendly
Dental Insurance
Vision Insurance
Life insurance
Health Savings Account (HSA)
Flexible Spending Account (FSA)
401K Matching
Military leave

Senior ASIC Design Engineer to develop high-performance, low-latency Switch Silicon RTL and deliver production-ready, timing-clean designs at NVIDIA's Santa Clara engineering team.

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Posted 29 days ago

CesiumAstro is hiring a Verification Engineer II in Austin to develop UVMf-based FPGA/digital verification infrastructure, drive CI/regression efforts, and mentor engineering teams for satellite phased-array systems.

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