The Role
We’re searching for a Staff Performance Modelling Engineer (San Francisco), to create and own the analytical and simulation models that steer OTPU architecture and software evolution. You will build functional simulators as well as high-fidelity, cycle-accurate models of our optical compute system. This role is critical to explore “what-if” design spaces, and deliver insights that directly influence our software, hardware, and optical roadmaps. This role sits at the crossroads of hardware architecture, software tooling and machine-learning workload analysis, perfect for an engineer who loves data-driven decision-making and fast iteration.
Responsibilities
Ownership: Define and deliver the technical vision and roadmap for your team that unlocks key strategic technical and business goals that are essential to the success of Flux.
Collaboration: Partner closely with all engineering teams to help shape our overall system architecture and delivery while ensuring models reflect reality and reality meets performance goals.
Champion Modelling: Educate peers on modelling methodology and champion data-driven design culture.
Functional Simulator: Design, build, and maintain a functional simulator of the OPTU subsystem and full pipeline.
Performance Simulator: Design and maintain architectural & cycle-accurate models of the OPTU subsystems and pipeline. Identify throughput, latency and utilisation hot-spots; propose architectural, or scheduling fixes.
Workload Analysis & Bottleneck Hunting: Instrument benchmarks (LLMs, diffusion, graph workloads) to collect detailed traces.
Design-Space Exploration: Run massive parameter sweeps with your functional and to understand tradeoffs and guide the software, hardware, and optical teams.
Tooling & Automation: Develop Python/C++ tooling for trace parsing, statistical analysis and visualisation.Integrate models into CI so that every RTL commit gets a performance smoke test.
Skills & Experience
7+ years building performance or power models for CPUs, GPUs, ASICs, or accelerators.
Proven track record providing technical leadership to a team of 5~10 engineers, resulting in significant business impact.
Strong coding ability in C++ and Python; experience with discrete-event or cycle-accurate simulators (e.g., gem5, SystemC, custom in-house).
Strong grasp of computer-architecture fundamentals: memory systems, interconnects, queuing theory, Amdahl/Gustafson analysis.
Familiarity with machine-learning workloads and common frameworks (PyTorch, TensorFlow, JAX).
Comfort reading RTL or schematics and discussing micro-architectural trade-offs with hardware designers.
Excellent data-visualisation and communication skills: able to turn millions of simulation samples into one decisive slide.
Bachelor’s in EE, CS, Physics, Applied Maths or related; advanced degree preferred but not required.
Personal or open-source projects in simulators, ML kernels, or performance analysis are a significant plus.
Compensation & Benefits
Starting salary: $275,000 - $336,000, depending on experience.
Generous stock options in a rapidly growing AI company
Based in our office in central San Francisco
To foster collaboration in our high-growth environment, we require all employees to work from our SF office and live within a 45-minute commute. We offer an extra ($24,000/year) incentive for those living within 20 minutes.
Due to U.S. export control regulations, candidates’ eligibility to work at Flux depends on their most recent citizenship or permanent residency status. We are generally unable to consider applicants whose most recent citizenship or permanent residence is in certain restricted countries (currently including Iran, North Korea, Syria, Cuba, Russia, Belarus, China, Hong Kong, Macau, and Venezuela). Applicants who have subsequently obtained citizenship or permanent residency in another country not subject to these restrictions may still be eligible.
We do not accept unsolicited CVs from recruitment agencies, will not be liable for any fees, and prohibit unauthorised use of our company name in recruitment activities.
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