Staff RTL Engineer, Ingress/Egress

Position Overview

We are seeking an RTL Engineer to help define and implement our industry-leading Networking IC. If you're a highly motivated self-starter eager to solve real-world problems, this is a unique opportunity to shape the future of AI Networking. As part of the Design Group, you will be responsible for defining, specifying, architecting, executing, and productizing cutting-edge Networking devices.

The candidate will be part of Design Group responsible for defining, specifying, architecting, executing and productizing leading-edge Networking devices. 

Responsibilities 

• Egress/Ingress Design: Design and architect solutions for high-speed networking device, focusing on latency optimization, memory management, and quality of service (QoS) support.
• Implementation and Testing: Implement memory management designs on FPGA or ASIC platforms, ensuring compliance with industry standards and performance benchmarks. Conduct thorough testing and validation to ensure functionality and reliability.
• Performance Optimization: Analyze and optimize memory management techniques to improve performance metrics. Collaborate with hardware and software teams to achieve optimal integration.
• Protocol Support: Provide support for various networking protocols and standards related to input and output queues, including Ethernet.
• Troubleshooting and Debugging: Investigate and resolve complex issues related to packet queuing, working closely with cross-functional teams, including hardware engineers, firmware developers, and system architects.
• Documentation and Reporting: Create comprehensive documentation, including specifications, test plans, design reviews, and technical reports. Communicate findings and recommendations effectively to stakeholders.

Qualifications

• Master’s degree in Electrical Engineering (MSEE) with 8-15 years of experience.
• Proven expertise in designing and optimizing memory management algorithms and QoS mechanisms, for high-speed networking devices.
• Solid understanding of FPGA or ASIC design methodologies, including synthesis, simulation, and verification tools (e.g., Verilog, VHDL, Synopsys, Cadence).
• Experience with Ethernet networking protocols (e.g., IEEE 802.1Q, 802.1p, 802.1ad).
• Knowledge of IP networking protocols; experience with TCP/UDP and related protocols is a plus.
• Proficiency in scripting languages (Python, Perl, Tcl) for automation and tool development.
• Strong analytical and problem-solving abilities, with meticulous attention to detail in troubleshooting and debugging complex networking issues.
• Excellent verbal and written communication skills, with the ability to collaborate effectively in a team environment and present technical information to diverse audiences.

Why Join Us? 

At Eridu AI, you’ll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI networking solutions, transforming data center capabilities. 

The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.