Browse 18 exciting jobs hiring in Vhdl now. Check out companies hiring such as Axiad, Jobgether, E-Space in Madison, Philadelphia, Plano.
Lead RTL-driven FPGA design and system bring-up for a security-focused hardware platform at a fast-growing Silicon Valley company.
Lead emulation strategy and infrastructure at Alphawave IP as a Staff Emulation Engineer, driving methodology, automation, and cross-functional support for complex SoC/ASIC projects.
Lead end-to-end FPGA RTL architecture and flight-ready firmware development for E-Space's LEO satellite avionics from our Saratoga office.
Contribute to NVIDIA’s hardware ASIC teams on a 12-week, full-time internship building and verifying RTL and physical-design solutions for next-generation accelerated computing products.
A paid, full-time 12-week hardware verification internship at NVIDIA in Santa Clara for students pursuing degrees in electrical or computer engineering to work on real verification and validation projects.
NVIDIA seeks ambitious Bachelor's, Master's, and PhD students for 12-week Mixed Signal and Digital Circuit Design internships to contribute to impactful hardware projects using modern EDA tools and lab test equipment.
NVIDIA is hiring Computer Architecture interns for paid, hands-on 12-week projects focused on GPU/CPU architecture, VLSI, parallel programming, and high-performance computing.
Paid 12-week hardware engineering internships at NVIDIA offering hands-on projects in system validation, hardware design, mechanical engineering, or silicon solutions for students pursuing EE/CE or related degrees.
Lead system-level HDL and FPGA architecture for advanced RF and antenna products at a fast-growing private engineering company.
CesiumAstro is hiring an FPGA Engineering Manager to lead geographically distributed FPGA teams, standardize design methodology, and deliver complex FPGA solutions for aerospace and communications products.
SpaceX Starshield is hiring an FPGA Engineer to build and validate flight-ready FPGA designs for secure, high-throughput satellite systems.
Work on multi-FPGA, low-latency hardware systems at Riverlane to implement QEC decoders, high-throughput data movement and low-latency interfaces as a Digital Design Engineer.
Lead development of low-latency FPGA firmware and DSP for synchronized multi-channel quantum control systems at an early-stage quantum computing startup in Princeton.
Senior Engineer - Hardware Modeling to drive AI-assisted SystemC and SoC modeling efforts and integrate those pipelines with industry EDA tools.
Lead FPGA design and verification efforts for Red 6's ATARS product, applying deep FPGA expertise to high-speed interfaces, timing closure, and system integration in a fast-paced aerospace environment.
Lead FPGA Engineer to architect and deliver high-performance multi-FPGA designs and lead the FPGA engineering team for Red 6's AR-based training systems.
Lead and technically drive a team of digital engineers at Northrop Grumman to deliver FPGA, firmware and high-speed digital subsystem designs for mission-critical defense programs.
Become a key FPGA Engineer at ispace U.S., focused on designing and validating FPGA-based avionics systems for cutting-edge lunar lander missions.
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