Browse 17 exciting jobs hiring in Soc Design now. Check out companies hiring such as Intel, Efficient Computer, NVIDIA in Philadelphia, Spokane, Oakland.
Intel is hiring an SoC Front-End Design Engineer to develop and integrate CPU RTL and microarchitectural features for next-generation client SoCs in Hillsboro, OR.
Lead the physical design effort at Efficient to deliver low-power SoCs from synthesis to tape-out, working across design, verification, and foundry partners to enable our energy-efficient processor platform.
Lead SoC-level pre-silicon verification at Intel, owning strategy, execution, coverage closure and mentoring a team to drive first-silicon success.
Intel is seeking a Senior CPU Logic Design Engineer in Austin to lead RTL design, microarchitecture implementation, and verification for next-generation CPU cores.
Lead silicon and system product development at NVIDIA by translating market requirements into performance and power optimizations and driving features from architecture through silicon to production.
Work with a fast-moving AI hardware team to design and optimize custom accelerators and SoC solutions that power next-generation machine learning systems.
Work on next-generation AI accelerators and SoC solutions, designing and optimizing hardware to power high-performance machine learning systems in a remote, collaborative environment.
Intel Central Engineering Group is hiring a Senior Silicon Design Engineer to lead RTL-to-GDS physical implementation, timing and power closure, and verification/signoff for complex SoC and IP designs.
NVIDIA is hiring a Senior Video ASIC Design Engineer to architect and implement video IP for next-generation SoCs, driving design quality and performance alongside cross-functional teams.
Lead and grow a district Solutions Consulting team to deliver technical leadership, drive customer technical wins, and accelerate adoption of Palo Alto Networks security platform.
Intel's Silicon Engineering Group seeks a SOC Design Engineer to develop and optimize CPU RTL, drive microarchitecture features, and collaborate on SoC integration and verification.
Intel is hiring a technically strong CPU Backend Engineer to lead full-chip timing convergence, STA verification, and cross-functional collateral handoffs for future CPU designs.
Senior Technologist to lead end-to-end ASIC/SoC development for SanDisk storage controllers, providing technical authority, risk management, and cross-functional leadership.
SRI's Center for Advanced Imaging is hiring an RIT electrical engineering co-op to work onsite in Princeton on analog/digital circuit design, PCB work, and embedded imaging hardware development.
Contribute to advanced imaging hardware development as a Stevens Institute of Technology co-op at SRI's Princeton lab, working on analog/digital circuit design, PCB layout, and system-level hardware integration.
E-Space is hiring a Comms Avionics Lead Engineer to lead RF and mixed-signal hardware design, integration, and qualification for its LEO satellite communications systems from our Saratoga office.
NVIDIA is hiring a Senior ASIC Physical Design Engineer (Netlisting) to drive netlist quality, equivalence checking, CDC analysis and timing closure for high-performance CPU/GPU/SoC designs.
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