Lead Physical Design Engineer
Skills
- Extensive physical design and tape-out leadership experience
- Hands-on use of Synopsys and/or Cadence EDA flows for synthesis and place-and-route
- Experience with DRC/LVS closure and GDS-II delivery to foundries
- Power and energy modeling for low-power SoCs
- Experience integrating analog and digital IP
- Familiarity with post-silicon bring-up and validation
- Experience with continuous integration and automated testing for chip flows
Responsibilities
- Lead physical design team through synthesis, place-and-route, and sign-off to tape-out
- Execute physical design tasks including synthesis, P&R, timing closure, and sign-off flows
- Integrate analog and digital IP with the digital design team and resolve integration issues
- Drive DRC & LVS closure to produce DRC-clean GDS-II for foundry submission
- Coordinate with foundry and backend services partners during multi-party wafer and manufacturing runs
- Perform power and energy modeling on synthesized and place-and-routed designs
- Implement and maintain physical design processes, CI, and tool flows
- Mentor and train junior physical design engineers and promote best practices
Education
- Master's degree in Electrical Engineering (required) with 7+ years industry experience
- OR PhD in Electrical Engineering with 5+ years industry experience
Benefits
- Competitive salary ($200k–$230k) plus meaningful equity
- Company-paid benefits and 401(k) match
- Paid parental leave
- Professional development and growth opportunities
- Flexible work arrangements (onsite/hybrid/remote options)
Average salary estimate
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