Browse 16 exciting jobs hiring in Physical Design now. Check out companies hiring such as Credence, Efficient Computer, Voyant Photonics in Orlando, Boise City, Rochester.
Experienced security professional needed to lead SCIF program management and compliance efforts for HQ AFMC A/2 at Wright-Patterson AFB.
Lead the physical design effort at Efficient to deliver low-power SoCs from synthesis to tape-out, working across design, verification, and foundry partners to enable our energy-efficient processor platform.
Lead silicon architecture and delivery at Voyant Photonics as VP of Silicon Engineering, owning multi-project ASIC development from architecture through volume production to enable next-generation compact FMCW LiDAR.
Lead the ML roadmap and build agentic, production-ready systems that make chip designers dramatically more productive at a fast-growing Palo Alto AI startup.
Intel Central Engineering Group is hiring a Senior Silicon Design Engineer to lead RTL-to-GDS physical implementation, timing and power closure, and verification/signoff for complex SoC and IP designs.
Help build world-class VLSI physical-design and CAD tools at NVIDIA by developing high-performance algorithms and software for floorplanning, placement, routing, and visualization.
Senior substation physical engineer needed to lead physical layout and detailed design of transmission and distribution substations for a well-established engineering firm.
NVIDIA is hiring a Senior Video ASIC Design Engineer to architect and implement video IP for next-generation SoCs, driving design quality and performance alongside cross-functional teams.
Intel is hiring a technically strong CPU Backend Engineer to lead full-chip timing convergence, STA verification, and cross-functional collateral handoffs for future CPU designs.
Senior Technologist to lead end-to-end ASIC/SoC development for SanDisk storage controllers, providing technical authority, risk management, and cross-functional leadership.
Early-career CAD Engineer to drive standard cell development, automation, and DFM practices for NVIDIA's cutting-edge physical design teams in Santa Clara.
NVIDIA is hiring a Senior ASIC Physical Design Engineer (Netlisting) to drive netlist quality, equivalence checking, CDC analysis and timing closure for high-performance CPU/GPU/SoC designs.
NVIDIA is recruiting first- and second-year undergraduates for a 12-week, on-site Ignite Hardware Engineering internship in Santa Clara to work on real GPU, ASIC, and hardware infrastructure projects.
SpaceX is hiring a Physical Design Engineer to work on ASIC physical implementation and signoff for next-generation Starlink silicon.
Lead the AI roadmap and a growing ML team at a Palo Alto startup building agentic systems that speed up semiconductor design through RTL code generation and physical-design optimization.
Drive EDA automation and ADK development for advanced semiconductor 3DHI and IC design workflows at the Texas Institute for Electronics.
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