Job Details:

Job Description: 

Join Us in Shaping the Future  

At Intel, we are building the next generation of software innovation through the oneAPI software stack, a unified programming model designed to unlock the full potential of heterogeneous computing. Our team is at the forefront of enabling developers worldwide to harness CPUs, GPUs, and accelerators with cutting-edge tools, libraries, and compilers. By joining us, you’ll contribute to an open ecosystem that drives performance, scalability, and portability across diverse architectures—empowering breakthroughs in AI, HPC, and beyond. If you’re passionate about transforming how the world computes and want to work on technology that truly matters, this is your opportunity to make an impact. 

The Team 

The Intel Compiler Engineering Team is a high performing team responsible for the creation of the industry-leading Intel C/C++/DPC++ and Fortran Compilers, and is a leader in LLVM.org, the basis of our compiler products.  We are continually pushing the boundaries of compiler technology in support of providing maximally useful and performant compilers for all of Intel’s processor platforms, both CPU and GPUs. 

Position Overview 

We are seeking a dynamic leader to build and scale world-class compiler engineering teams driving Intel’s next-generation compiler products and open-source contributions. In this role, you will lead geographically distributed teams of 15–25 highly skilled compiler engineers and architects, fostering collaboration across multiple time zones. Your strong technical background in compiler technology will enable you to guide and mentor experts, ensuring alignment with our product and technology goals.

 

As the Sr. Compiler Engineering Manager, you will:

• Lead and grow high-performing teams delivering cutting-edge compiler  products and technology.
• Define and drive the technical vision and strategic roadmap for Intel’s compiler products and technology.
• Champion innovation and a culture of technical excellence and continuous learning, as well as collaboration and contribution to the open-source community.
• Collaborate cross-functionally with hardware, runtime, and application teams to deliver integrated solutions.
• Own talent development, including hiring, performance management, and career growth for team members.
• This is an opportunity to shape the future of heterogeneous computing and influence open standards like LLVM, SYCL, and OpenMP while working on technology that powers AI and HPC workloads globally.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences. 

Required Qualifications:

• BS with 8+ OR MS with 6+ OR PhD with 4+ years of experience with a degree in Computer Science or related field.

• 10+ years of hands-on software engineering, application performance tuning and software engineering management.

•  5+ years experience of direct software engineering management experience with demonstrated ability of building and leading high performing teams.

Preferred Qualifications:

• Experience with compiler engineering.

• Hardware knowledge: understanding of modern CPU, GPU, and accelerator architecture. 

• Demonstrated knowledge with accelerated computing and parallel programming models.

• Experience leading team contributing to LLVM projects.

• Strong communication skills.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location: 

US, California, Santa Clara

Additional Locations:

US, Arizona, Phoenix, US, California, Folsom, US, Massachusetts, Beaver Brook, US, Oregon, Hillsboro, US, Texas, Austin

Business group:

The Software and AI (SAI) Team drives customer value by enabling differentiated experiences through leadership AI technologies and foundational software stacks, products, and services. The group is responsible for developing the holistic strategy for client and data center software in collaboration with OSVs, ISVs, developers, partners and OEMs. The group delivers specialized NPU IP to enable the AI PC and GPU IP to support all of Intel's market segments. The group also has HW and SW engineering experts responsible for delivering IP, SOCs, runtimes, and platforms to support the CPU and GPU/accelerator roadmap, inclusive of integrated and discrete graphics.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.  Find more information about all of our Amazing Benefits here:

https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003

 

 

Annual Salary Range for jobs which could be performed in the US: $169,820.00-322,070.00 USD

 

 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

 

 

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.