Flux Computing designs and manufactures optical processors to train and run inference on large AI models. Join us to be part of a highly motivated and skilled team that thrives on delivering impact and innovation at speed.
The Role
We’re searching for an ASIC Digital Design Manager to lead and deliver the digital subsystems of our next-generation high-speed mixed-signal ASICs. This is a hands-on leadership role with a strong focus on execution speed, first-time-right delivery, people management, and cross-functional alignment.
You will drive your team to deliver complex digital systems that integrate high-bandwidth interfaces, deterministic control loops, and advanced mixed-signal blocks—on schedule, on budget, and with uncompromising quality. As both a leader and technical authority, you will mentor engineers, set a high bar for performance, and ensure the program executes with precision from concept through tape-out to mass production.
Responsibilities
Execution Ownership & Speed – Lead end-to-end delivery of digital subsystems (RTL, synthesis, DFT/DFD, timing closure, physical implementation), ensuring aggressive schedule targets are met without compromising quality.
Right-First-Time Delivery – Build and enforce processes that prioritize robust design, rigorous verification, and silicon bring-up strategies that achieve first-silicon success.
Line & Performance Management – Manage, mentor, and grow a high-performing team of 6–12 digital and mixed-signal engineers. Own goal-setting, performance reviews, career development, and hiring, while fostering a culture of accountability and continuous improvement.
Cross-Functional Alignment – Drive seamless collaboration across analog, verification, layout, packaging, firmware, and test teams to keep programs moving fast and aligned from architecture → spec → implementation → sign-off → bring-up.
Program Leadership – Define and track aggressive schedules, resource plans, and risk-mitigation strategies. Communicate progress, trade-offs, and escalation paths clearly to executives and customers.
Technical Direction – Provide architectural and implementation guidance for high-speed digital subsystems, including multi-lane data paths, clocking, and mixed-signal control loops.
Culture of Speed & Quality – Champion design automation, streamlined methodologies, and knowledge sharing to deliver high-quality silicon on tight timelines.
Skills & Experience
10+ years of digital ASIC development, with at least 3 full product cycles successfully executed from specification to high-volume production.
Proven track record of driving on-time, first-time-right delivery of complex, high-performance ASICs with mixed-signal interfaces (e.g., SerDes, DACs/ADCs, RF SoCs, display/camera pipelines).
Strong expertise in RTL design (SystemVerilog/Verilog), CDC/RDC, STA, synthesis, P&R, power intent (UPF/CPF), and DFT/DFD methodologies.
Deep understanding of mixed-signal interaction (coupling, jitter, supply noise, calibration) and ability to partner effectively with analog teams on specification splits.
Demonstrated success in line management and performance management, including hiring, mentoring, and building high-performing engineering teams.
Skilled in fast-paced, cross-functional program leadership with a proven ability to manage schedules, risks, and vendor/foundry relationships.
Outstanding written and verbal communication; confident presenting clear, concise program and technical status to executives, customers, and cross-site teams.
Frequent travel is expected between our Austin and London offices.
We’re building fast and that includes our benefits. More exciting additions are coming soon for the Flux crew.
If you are passionate about pushing the boundaries of what's possible in AI and thrive in a high-energy, fast-paced environment, we want to hear from you. Apply now to join Flux and be a key player in shaping the future of computing.
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