Silicon Formal Verification - Intern
Positions are open for full-time and co-op/internship roles in the areas of formal verification of CPU, Fabric, and Accelerator design.
- As a Formal Verification Intern, you will be involved in the formal verification of the architecture and microarchitecture of a high-performance RISC-V core, a coherent fabric, and an accelerator design. In this position, you will:
- Prove functional and security properties of the design, find design bugs
- Develop reusable and scalable proof techniques.
- Experience with model checking/interactive theorem provers
- Coursework or experience in formal methods
- Knowledge of declarative programming language
Education and Experience
PhD, Master’s Degree, or Bachelor’s Degree in a technical subject area.
Average salary estimate
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Work on compiler and toolchain development for the RISC-V ecosystem, contributing features and optimizations to LLVM/GCC/binutils while collaborating with silicon and architecture teams in a remote, open-source-focused environment.
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