Principal Digital Circuit Design Engineer
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Marvell’s Central Engineering Business Unit is seeking a Principal Digital Design Engineer to join our Burlington, VT team. We are seeking a talented and experienced Memory Circuit Design Engineer to join our team. In this position, you will be responsible for the design, verification, and characterization of high-performance memories for cutting-edge semiconductor products. The ideal candidate will have a solid understanding of digital and analog circuit design principles, with a proven track record of delivering successful memory designs in advanced process nodes.What You Can Expect
Lead the design and supervise the layout of custom memory cells, arrays, and peripheral circuits, focusing on performance, power, and area optimization.
Conduct comprehensive circuit simulations to ensure functionality, timing, and robustness across process, voltage, and temperature.
Custom circuit schematic and cross-section entry using Cadence Virtuoso design tools.
Characterize custom SRAM for view development.
Identify and propose innovative solutions to enhance power-performance-area metrics.
Partner with the Hardware and Silicon Validation Team for silicon evaluation and root cause Model to Hardware Correlation (MHC) issues.
Develop and improve design methodologies, flows, and scripts to enhance productivity and quality.
Analyze, summarize, document, and present results effectively.
What We're Looking For
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
10+ years of hands-on experience in digital circuit design, with a focus on custom memory and transistor-level digital circuit design in advanced CMOS technologies.
Experience with various SRAM architectures (e.g., 6T, 8T, multi-port, pseudo-2-port)
Proficiency in industry-standard EDA tools (e.g., Cadence Virtuoso, SpectreX, QuantusQRC parasitic extraction).
Familiarity with statistical analysis methods.
Ability to work effectively in a collaborative team environment.
Preferred Qualifications
Experience with custom SRAM or DRAM design and characterization.
Ability to work independently and manage project deadlines effectively.
Strong verbal and written communication skills.
Knowledge of physical design processes and tools.
Expected Base Pay Range (USD)
148,500 - 219,780, $ per annumThe successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
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