Browse 8 exciting jobs hiring in Asic Design now. Check out companies hiring such as Eliyan, NVIDIA, SpaceX in Reno, Fayetteville, Glendale.
Lead physical design strategy and execution as a Sr Staff/Principal Engineer at a high-growth chiplet startup, driving RTL-to-GDSII delivery and flow automation for advanced-node ASICs.
Work on high-performance GPU/SoC subsystems at NVIDIA, driving RTL micro-architecture, implementation, verification and post-silicon bring-up for world-class chips.
SpaceX is looking for a Sr. ASIC Design Engineer to architect and implement RTL for next-generation ASICs and FPGAs that will power Starlink’s space and ground systems.
SpaceX is seeking a Principal ASIC Design Engineer to lead RTL and silicon development for next-generation Starlink ASICs and FPGAs used in space and ground infrastructure.
Contribute to Starlink's next-generation ASICs as a Physical Design Engineer, driving physical implementation, signoff closure, and automation to enable reliable connectivity worldwide.
Experienced ASIC designers are needed to lead RTL/IP and SoC design for a startup developing memory-acceleration silicon for AI/datacenter systems, working onsite in Santa Clara or Boston.
Lead ASIC design verification efforts at Palo Alto Networks, architecting and executing coverage-driven verification across simulation, emulation, formal, and silicon validation to deliver secure, high-performance ASICs to production.
An in-person 12-week paid software internship in San Jose working across systems, firmware, infrastructure, or chip simulation to help build and validate next-generation AI inference hardware and platform tooling.
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