Staff Engineer, Physical Design Flow
Skills
- Expertise in physical design/CAD methodology on advanced semiconductor nodes.
- Hands-on experience with Synopsys, Cadence, and other industry-standard EDA tools for synthesis, place-and-route, STA, and signoff.
- Strong skills in optimizing hierarchical flows and chip assembly for runtime efficiency and PPA.
- Scripting and automation capabilities to enhance CAD flows.
- Ability to collaborate across teams and with external EDA vendors.
Responsibilities
- Develop, optimize, and automate advanced RTL-to-GDS implementation flows for AI silicon.
- Collaborate with cross-functional teams including physical verification, RC extraction, and timing analysis.
- Enhance performance, power, and area (PPA) at every design stage using industry-standard EDA tools and ML-based solutions.
- Partner with EDA vendors to drive tool improvements and implement CAD automation and scripting.
Education
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field typically required.
Benefits
- Highly competitive compensation package including base and variable pay.
- Hybrid work environment with flexibility based in Santa Clara, Austin, or Fort Collins.
- Opportunities to work with cutting-edge AI/ML chip technologies and influence future EDA tools.
- Commitment to diversity, equity, and equal employment opportunities.
Average salary estimate
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