Job Details:

Job Description: 

Do Something Wonderful!

Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and have a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.

Who We Are

The Server Emulation CoE (Center of Excellence) Team is seeking a motivated and highly skilled Emulation Engineer to lead the design and development of Transactor/BFM solutions to support the next gen Server SoC Emulation models. As a Technical Lead of the Emulation Xtor/BFM team, you will play a pivotal role in in architecting solutions and leading a team of skilled engineers in developing and maintaining transactors and Bus Functional Models (BFMs) for our emulation environment.

Who You Are

This role is in Emulation Solutions Engineer. Your responsibilities will include, but are not limited to:

• As a Technical Lead, you will own the architecture of transactor (xtor) and Bus Functional Model (BFM) solutions for Server SoC emulation models.

• You will lead a team to develop and maintain these solutions, ensuring they meet the validation needs specified by SoC emulation validation teams.

• You'll be interacting with SoC verification engineers to understand validation requirements which the emulation transactor/BFM solutions must satisfy.

• You will also frequently interact with SoC, IP architects and partner teams cross-organization as well as external EDA vendors to architect xtor/bfm solutions which are compatible with SoC emulation models and the emulation execution environment.

• You must ensure proper design and implementation of the SW interface between your transactor/bfm design with the selected testbench environment such as C/C++, SystemC, simulators, etc.

• You are also expected to lead and mentor a team of engineers, providing guidance and support to ensure successful project execution and delivery.

• Additionally, you are responsible for driving innovation in emulation methodologies and contributing to the continuous improvement of emulation processes and tools.

• Excellent problem-solving and debugging skills

• Effective communication and collaboration abilities

• Familiarity with FPGA-based emulation platforms and tools

• Attention to detail and a commitment to delivering high-quality work

• Ability to work independently and as part of a team in a fast-paced and dynamic environment

Join our team and contribute to the development of high performance transactor/BFM SW stacks by leveraging your expertise from past transactor and BFM development. We offer a challenging and rewarding work environment where you can grow professionally and make a significant impact on our exciting projects.

Qualifications:

You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
 

Minimum Qualifications

• Bachelor's Degree in Electrical Engineering, Computer Engineering, or any related field with 4+ years of relevant experience -OR- Master's Degree in Electrical Engineering, Computer Engineering, or a related field with 3+ years of relevant experience

• 3+ years of experience in developing transactors or BFMs for various communication protocols

Preferred Qualifications

• Experience and understanding of communication protocols such as PCIe, CXL, UCIe, etc.

• Experience and proficiency in hardware description languages (HDL) such as Verilog and System Verilog

• Experience in programming skills in languages such as C++, SystemC, Python, or Perl

• Proficiency in using industry standard tools/flow such as Git, Make, TeamCity, Jenkins, JIRA, etc. for large SW development projects

• Proficiency in at least one coherency bus protocol like AMBA CHI is a plus

• Prior leadership experience in leading the design/implementation of a SW project is a plus

          

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location: 

US, Oregon, Hillsboro

Additional Locations:

US, California, Santa Clara, US, Texas, Austin

Business group:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.  Find more information about all of our Amazing Benefits here:

https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003

Annual Salary Range for jobs which could be performed in the US:

$153,540.00-$216,770.00

Salary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.