Timing Closure Jobs
Browse 7 exciting jobs hiring in Timing Closure now. Check out companies hiring such as NVIDIA, Penske Truck Leasing, SharkNinja in Chicago, North Las Vegas, Shreveport.
NVIDIA is hiring a Senior Digital Design Engineer to drive front-end RTL/firmware development, synthesis and timing closure, and post-silicon bring-up for high-speed I/O and silicon photonics products.
Contribute to NVIDIA's hardware teams as a 12-week Hardware Physical Design / VLSI intern, working on synthesis, timing, floorplanning, and EDA tool flows that impact real chip projects.
NVIDIA is recruiting motivated students for a 12-week Hardware Physical Design / VLSI internship to gain hands-on experience on real chip physical design projects using industry EDA tools and methodologies.
SpaceX is hiring a Senior ASIC Design Engineer to implement and verify RTL for next-generation ASICs/FPGAs that will expand Starlink's global connectivity capabilities.
Lead FPGA design and verification efforts for Red 6's ATARS product, applying deep FPGA expertise to high-speed interfaces, timing closure, and system integration in a fast-paced aerospace environment.
Drive physical design and static timing analysis to achieve timing closure on high-performance ASICs (GPUs/CPUs/SoCs) at NVIDIA's Santa Clara engineering team.
Lead FPGA Engineer to architect and deliver high-performance multi-FPGA designs and lead the FPGA engineering team for Red 6's AR-based training systems.
