Browse 19 exciting jobs hiring in Tcl now. Check out companies hiring such as NVIDIA, Western Digital, Jobgether in Wichita, Worcester, Aurora.
Contribute to NVIDIA's hardware teams as a 12-week Hardware Physical Design / VLSI intern, working on synthesis, timing, floorplanning, and EDA tool flows that impact real chip projects.
Experienced embedded software/firmware engineer needed to lead development of manufacturing host applications and firmware for high-volume HDD production at Western Digital in Irvine.
Lead emulation strategy and infrastructure at Alphawave IP as a Staff Emulation Engineer, driving methodology, automation, and cross-functional support for complex SoC/ASIC projects.
Rivos seeks a Silicon Power Engineer to lead power modeling, analysis, and optimization across CPU/SoC blocks, partnering closely with architecture and design teams to drive PPA improvements.
Lead emulation strategy and hands-on infrastructure development for large-scale SoC/ASIC projects at Alphawave IP, optimizing platforms, automation, and cross-functional bring-up workflows.
A paid, full-time 12-week hardware verification internship at NVIDIA in Santa Clara for students pursuing degrees in electrical or computer engineering to work on real verification and validation projects.
NVIDIA is recruiting motivated students for a 12-week Hardware Physical Design / VLSI internship to gain hands-on experience on real chip physical design projects using industry EDA tools and methodologies.
Silvaco seeks an Optics & Electromagnetics Intern to work remotely on computational lithography simulations, model calibration, and GPU‑accelerated tool development.
NVIDIA is hiring a Senior Circuit Design Engineer to lead power delivery network modeling and simulation across die-to-platform designs and mentor junior engineers in a hybrid Santa Clara role.
SpaceX is hiring a Senior ASIC Design Engineer to implement and verify RTL for next-generation ASICs/FPGAs that will expand Starlink's global connectivity capabilities.
Experienced analog/mixed-signal engineer wanted to lead memory core circuit design and silicon characterization at a leading 3D NAND memory company in Rancho Cordova.
Lead FPGA design and verification efforts for Red 6's ATARS product, applying deep FPGA expertise to high-speed interfaces, timing closure, and system integration in a fast-paced aerospace environment.
Drive physical design and static timing analysis to achieve timing closure on high-performance ASICs (GPUs/CPUs/SoCs) at NVIDIA's Santa Clara engineering team.
Experienced C++/Java software engineer to build and evolve Altera’s FPGA debug and IDE tools, focusing on desktop GUI, multithreaded systems, and tight toolchain integrations.
Lead FPGA Engineer to architect and deliver high-performance multi-FPGA designs and lead the FPGA engineering team for Red 6's AR-based training systems.
Work on Etched's SoC power flows to generate accurate power profiles, build automation for RTL/gate-level estimation, and support IR/thermal sign-off for high-performance AI ASICs.
Expert Physical Design Engineer needed to drive RTL2GDS implementation of high-performance LiDAR SoCs at Aeva.
Experienced Physical Design Engineer needed at Sandisk to lead synthesis, PNR, STA, and related digital physical design efforts in Milpitas, CA.
GlobalFoundries seeks a skilled Design Application Engineer to provide technical support and solutions for Power Management applications in a customer-focused role.
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