Rambus Careers, Benefits, Review

Rambus is seeking a New College Grad Validation Engineer in San Jose to develop PMIC validation environments and support post-silicon bring-up for memory power solutions.

Rambus is hiring an RTL Digital Intern to design SystemVerilog RTL and support chip integration and verification for high-performance memory interface products.

Rambus is hiring a New College Grad Verification Engineer to develop SV/UVM-based verification environments and tests for cutting-edge memory and silicon IP in a hybrid San Jose role.

Rambus is hiring a hands-on Validation Engineering Intern to support lab validation, test automation, and data analysis for high-speed memory (DDR5) buffer products.

Rambus seeks a New College Grad Digital Design Engineer (AMTS) to help develop memory and silicon IP through RTL design, ASIC flow work, and verification in a hybrid, team-oriented engineering environment.

Rambus is looking for a hands-on Digital Verification Intern to develop and validate DDR memory interface products using SystemVerilog, UVM, and scripting tools in a hybrid work environment.

Rambus is hiring a Test Engineering Intern in San Jose to support DFT, wafer-sort, first-silicon bring-up, and test program development for advanced memory and silicon IP products.

Work with Rambus' Product Engineering team in San Jose to build data-analysis tools that support testing and new product introductions for memory interface chips.