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Senior High Speed SerDes Validation Engineer

We are now looking for a Senior Validation Engineer in the DGX Server Product Engineering Team. In this role you will be working with a team of HW/SW engineers to develop and implement complex automated test plans for our industry leading GPU accelerated computing products.

What you will be doing:

  • Own validation of products from start to finish including test plan development, automation, design for validation requirements, resource planning, coverage metrics, test execution, bug resolution, and release to production.

  • Collaborate with ODMs, component suppliers, and QA teams to ensure no gaps in coverage.

  • Coordinate internal and external teams in different times zones.

  • Develop system level stress and performance testing strategies using industry leading Deep Learning/AI applications.

  • Solve complex system level hardware and software issues on GPU accelerated computing platforms.

What We Need to See:

  • Ability to work on site in hardware lab environment 5 days a week

  • BSEE or BSCE or equivalent experience

  • High speed IO validation

  • 6+ years or more of experience in validating and debugging complex systems.

  • Developing/running real world workload and factory diagnosis tools

  • Outstanding verbal and written communication skills.

  • Proficient in collaborating across teams and suppliers to deliver quality products on tight schedules.

  • Familiarity with lab instrumentations like Oscilloscopes (Digital Multi Meter)

  • High-speed SERDES validation experience (50GBaud/s and above) is a must.

  • Strong understanding of DSP-based high-speed SERDES architectures.

  • Coding experience with programming and scripting languages such as C/C++, JS and Python.

Ways to stand out from the crowd:

  • Experience with datacenter products including system management, security, networking, and storage.

  • Familiarity with Ethernet and InfiniBand switch architectures is a strong plus.

  • Hands-on experience with SERDES performance tuning would be a strong advantage.

  • Track record of continuous process improvement with a passion for tools and automation.

  • Proven knowledge in Circuit and Waveform analysis.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until August 23, 2025.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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Average salary estimate

$239250 / YEARLY (est.)
min
max
$168000K
$310500K

If an employer mentions a salary or salary range on their job, we display it as an "Employer Estimate". If a job has no salary data, Rise displays an estimate if available.

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NVIDIA is a publicly traded, multinational technology company headquartered in Santa Clara, California. NVIDIA's invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined computer graphics, and ignited the era of modern AI.

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CULTURE VALUES
Customer-Centric
Mission Driven
Inclusive & Diverse
Rise from Within
Diversity of Opinions
Work/Life Harmony
Growth & Learning
Transparent & Candid
BENEFITS & PERKS
Medical Insurance
Paid Time-Off
Maternity Leave
Mental Health Resources
Equity
Child Care stipend
Paternity Leave
WFH Reimbursements
Flex-Friendly
Dental Insurance
Vision Insurance
Life insurance
Health Savings Account (HSA)
Flexible Spending Account (FSA)
401K Matching
Military leave
FUNDING
DEPARTMENTS
SENIORITY LEVEL REQUIREMENT
TEAM SIZE
EMPLOYMENT TYPE
Full-time, onsite
DATE POSTED
August 27, 2025
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