Timing Verification Jobs

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Snacks

Onsite Gym

Family Coverage (Insurance)

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Health Savings Account (HSA)

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401K Matching

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Experienced GPU SOC Design Engineer needed at Intel to lead RTL logic design and integration for discrete graphics SoCs in an on-site role.

A seasoned ASIC/FPGA Engineer is needed at General Dynamics Mission Systems to lead design and verification of high-reliability defense electronics in a hybrid work setting.

Lead micro-architecture and RTL design for cutting-edge AI control subsystems at d-Matrix, a forward-thinking generative AI technology company.