Browse 4 exciting jobs hiring in Static Timing Analysis now. Check out companies hiring such as NVIDIA, PDDN INC., Taara in Newark, Madison, Houston.
Drive transistor-level timing analysis and custom macro validation at NVIDIA as a Senior Circuit Engineer specializing in Custom Timing.
An Irvine-based semiconductor team needs a Senior STA Physical Design Engineer to lead STA closure, SI/PI work, and chip finishing for complex digital SoCs with a hybrid remote/onsite arrangement.
Taara Connect is hiring an FPGA Design Engineer to design, verify, and bring up high-speed FPGA logic for optical communications and precision tracking systems.
Contribute to NVIDIA's hardware teams as a 12-week Hardware Physical Design / VLSI intern, working on synthesis, timing, floorplanning, and EDA tool flows that impact real chip projects.