Browse 10 exciting jobs hiring in Timing Analysis now. Check out companies hiring such as NVIDIA, PDDN INC., Advanced Technology Services in Indianapolis, Colorado Springs, Winston-Salem.
Lead transistor-level timing validation and methodology for custom macros and mixed-signal designs at NVIDIA to help drive timing accuracy and performance in advanced processor products.
Lead the design and implementation of CUDA-based IR drop, timing, and power estimation algorithms to accelerate internal EDA tools at NVIDIA.
An Irvine-based semiconductor team needs a Senior STA Physical Design Engineer to lead STA closure, SI/PI work, and chip finishing for complex digital SoCs with a hybrid remote/onsite arrangement.
Taara Connect is hiring an FPGA Design Engineer to design, verify, and bring up high-speed FPGA logic for optical communications and precision tracking systems.
NVIDIA is seeking a Senior ASIC Power Engineer to lead power-optimization and RTL delivery for high-performance GPU and system-on-chip designs across mobile, embedded and datacenter platforms.
Join NVIDIA's Silicon Solutions Group to lead post-silicon bring-up and system-level validation work that ensures performance, reliability, and successful product releases across GPU and SoC platforms.
Contribute to NVIDIA's hardware teams as a 12-week Hardware Physical Design / VLSI intern, working on synthesis, timing, floorplanning, and EDA tool flows that impact real chip projects.
NVIDIA is recruiting motivated students for a 12-week Hardware Physical Design / VLSI internship to gain hands-on experience on real chip physical design projects using industry EDA tools and methodologies.
Senior HSIO Architect role focused on system-level high-speed I/O architecture, post-silicon validation, and cross-functional optimization for NVIDIA's GPU-accelerated platforms.
SpaceX Starshield is hiring an FPGA Engineer to build and validate flight-ready FPGA designs for secure, high-throughput satellite systems.